Analog tens and units timer with source synchronization

ABSTRACT

A timing system for use in conjunction with a welding system, wherein the timing system consisting of separate tens and units counters, the counters being electronically controlled to select the tens counter prior to the selection of the units counter. A system is provided for generating synchronizing pulses and a bistable circuit, in the form of a flip flop, is utilized to switch from the tens counter to the units counter upon completion of the tens count.

O United States Patent [151 3,660,693 Markey 451 May 2,1972

[54] ANALOG TENS AND UNITS TIMER 2 3,397,323 8/1968 Hirsch ..307/293 xWITH SOURCE SYNCHRONIZATION 3,493,715 2/1970 Bigowsky et al. ..2l9/1 l43,526,742 9/1970 Hill ..2l9/l I4 [72] Inventor: James F. Markey,Detroit, MlCh. [73] Assignee: Weltronic Company, Southfield, Mich. OTHERPUBLICATIONS Greenberg; Pulse Operated Time Delay Relay." RCA [22]Flled' 1970 Technical Notes No. 409,.1anuary 1961 [21] Appl. No.: 77,234

Primary E.\'aminerDonald D. Forrer 52 us. Cl ..307/293, 219/1 14,307/269,

A!torneyHarness, Dickey & Pierce [51] Int. Cl. ..I-I03k 17/28 58 Fieldor Search 219/114, 1 15; 307/269, 283, 1571 ABSTRACT 307/2931 294;328/72 130 A timing system for use in conjunction with a welding system,wherein the timing system consisting of separate tens and units [56]References Cmd counters, the counters being electronically controlled toselect UNITED STATES PATENTS the tens counter prior to the selection ofthe units counter. A system IS provided for generating synchroniz ngpulses and a 3,183,372 5/1965 Chin ..328/74 X bistable circuit, in theform f 3 flip flop, is utilized IQ switch 3,388,346 6/1968 Roof et a]. 3--307/293 x from the tens counter to the units counter upon completionof 3,259,854 7/1966 Marcus et al. ....307/283 X h tens count, 3,267,3828/1966 Adem ..328/72 3,346,716 10/1967 Broomhall ..2l9/l 14 X 18 Claims,2 Drawing Figures i/fl 11/ 5 /7 /11 2/ 4 PATENTEDMM 2 I972 sum 2 BF 2drawings in which:

neither intended to define the invention of the application,

which is measured by claims, nor is it intended g to be limiting as tothe scope of the invention in any way. BACKGROUNDAND SUMMARY 'OF THEDISCLOSURE I This invention relates generally to a timing system andmore particularly to a timing system for use in connection with.automatically timing discrete portions of a welding cycle utilizingelectronic elementcontrol of thetimer.

. Referring now: to FIG. l, there isillustr'ated an input pulsegenerating synchronizing circuit "10- which is utilized to generatesynchronizing pulses for the-timing circuit, to be discussed inconjunction with FlG. 2, albistable flip flop circuit l2 which isutilized to control the switching from the tens to the units countingcircuits and an output pulsing circuit 14 which is utilized to advancethe sequence of the welding cycle.

Referring specifically to the pulse generating circuit 10. it is seenthat the circuit includes a pair of amplifying transistors 18, 20, thetransistor providing an output pulse on an out- -put conductor 22 tosynchronize the operation of the circuit to be described in FlG. 2. Thebaseelectrode of the transistor 18 is connected to an input conductor 24through a diode 2 6 and a resistor 28, the conductor 24 being connectedto asource of 24 volts of'altemating current. 'The alternating currentsupplied to the transistor 18 causes the voltage at the collector Incertain applicationsinthe welding art, a -need.has arisen for a highlyaccurate and highly reliable, timer. While prior systems have providedthe reliability required, the combination of reliability and extreme.accuracy has not been easily obtainable,,With the system of the presentinvention, theaforementioned need has been metiwith-a system forcontrolling 'weld, hold'and'off.

xi The system of the presentinvention contemplates providing a separatetens counter and a'separate units counter, .the system counting thetensportion' first andcompleting the each ofthe phases of a weldingcycle, as for example squeeze,

count by counting the units portion subsequently. A solid state bistablecircuit has been providedto switch back and forth between the tens andunits counter, in accordance with the n'eedsof the count to be achieved,and also senses the condition where only aunits count hasbeen. selectedwithout enteringinto thetens count area. Further,- the system includes aelectrode to be switched between approximately 1 5" volts connected toconductor .30 and ground potentialconnected to a conductor. This, ofcourse, is due to the fact that the input alternating voltage ,causestransistor 18110 switch from the conductive state during the positivehalf wave to the non-con ductive state .when the input voltage, andcurrent falls below synchronizing circuit which synchronizes the outputpulses from the counters to the line fifequencyJAlso, circuitry has beenprovided to insure that the counterstarts at a zero count and that thebistable switching circuit starts in the proper state. Accordingly, itis one object of the present invention to prov vide'an improved timingcircuit.

It is another-object of. thepres'ent-jnvention to providean improvedtiming circuit 1 which .is extremelyaccurate and highly reliable. I

- It is still another object of the present invention to provide animproved counting circuit-which incorporates separate tens ancl'unitscounters and utilizes a bistable switching circuit to select'the tenscounter in the case where a higher than a preselected minimum count.

It is still a furtherobject'of the present invention to provide animproved synchronizing circuit for insuring that the output count occursat'a preselected portion of a selected wave form.

It is still a further object of the present invention to provide animproved timing circuit which minimizes themalfunctioning of variouselectronic components utilized in the system.

It is still a further object of the present invention to provide animproved switching circuit for a timing system of the type described.

ltis a further object of the present invention to provide an count isdesired improved self-compensating output'circuit'for an electronic 7that required to maintain the conduction of transistor 18.

The collectorjelectrode of transistor -18 is connected to a capacitor36,1the capacitor 36 differentiating the square waves occurring atnode38 to provide a positive and negative going spike at node 40. Thenegative going spike is grounded through a diode 42 and the positivegoing spike is fedto the base electrode of transistor 20 through aresistor 44. The necessary bias for transistors l8 and 20' is providedbybase electrode resistors 46, 48 connected at one end to the respectivebase electrodes of the transistors 18 and 20 and atthe other end to anegative 12 volt direct current potential at conductor 50, l v

The positive going spikes are fed to the transistor 20 to switch thetransistor20 from the nonconductive state'to the conductive state. Thespikes are of sufiicient' magnitude to saturate the transistor 20 duringthe period that the transistor. is. conductivesThe conduction oftransistor'20 switches the collector voltage from a positive level toapproximately ground potential due to the connection of the emitterelectrode to the. ground conductor 32 and the low drop acrossfthecollector-emitter path. This pulse occursat the leading edge of thepositive pulse generated bytransi stor l8 and is fed to the outputconductor 22 through a fixed resistor and a variable potentiometer 58.The potentiometer varies the characteristic of the pulse being fed toconductor 22 such that the units counter circuit (to be described) willproducean output pulse .at the selected count as will be seen from afurther explanation ofFlG. 2. I

Referring now to the fiip flop circuit 12, it is seen that the bistablecircuitl2 includes a pair of transistors 62, 64 which tor 70 and aresistor 72, to the base electrode of transistor 62.

Thus, if an input pulse is supplied'to one of the transistors, for

example to the base electrode of transistor 64 by means'of a Furtherobjects, features and advantages of this invention I will becomeapparent from a consideration of the following description, the appendedclaims and'the accompanying FIG. 1 is a schematic diagrarn of a portionof a preferred system incorporating certain features of the presentinvention; and

tion of the preferred embodiment of the present invention.

1710:2195 schematic diagraniillustratingthe remaining porconductor 76,'aresistor 78 and a conductor 80, the pulse (in this case a positivepulse) will cause transistor 64 to'cond uct which will, in turn, causetransistor 62 to become non-conductive. The pulse supplied to conductor76 is a positive pulse and utilized to reset the system initially andthe resetting pulse causes transistor 64 to conduct.

In the operation of the system of the present invention, the

transistor 64 is initially turned on by means of a pulse on conductor 76and the transistor 62 is rendered non-conductive. This occurs during thetime that the system is to initiate the count of the tens portion of thecount. As will be seen from a description of FIG. 2, when the tens countis complete, a conductor 84 is grounded to thus ground the baseelectrode of the transistor 64 and turn the transistor64 off. However,the fact of turning the transistor 64 on causes transistor 62 to becomenon-conductive to presenta high voltage signal to conductor 66 tobackbias a diode 88, thus permitting the operation of the tens counter.

' When the units count is to be initiated, the transistor 64 is turnedoff because of the ground signal on conductor 84,

which signal is fed to the base electrode thereof through a capacitor88' and a diode 90, and the transistor 62 is rendered conductive. Theconduction of transistor 62 grounds the conductor 86, through conductor66 and diode 88, to disable the tens counter and a high positive signalis placed on a conductor 94 because of the high collector electrodevoltage of transistor 64, the connection being through the conductor 70.It will be remembered that the transistor 64 is non-conductive duringthe units count. It will also be noted that the conductor 94 waspreviously'grounded by virtue of the conduction of transistor 64, thusdisabling the operation of the units counter.

Because of the state of the flip flop 12, a conductor 98 is providedwith a high positive signal during the tens count and is groundedthrough the conduction of transistor 62 and the connection of a diode100 during the units count. Upon the completion of the units count, acompletion signal is impressed on a conductor 102 which is connected tothe base electrode of transistor 62 through a capacitor 104 and a diode106. The signal on conductor 102 is at ground potential at thetermination of the units count which grounds the base electrode oftransistor 62 and causes the transistor 62 to become non-conductive. The'cross coupling network will then cause transistor 64 to be renderedconductive to provide an output signal on an output conductor'106. v Inthe eventthat there is to be a total count for a particular cycle ofless'than l0, a positive signal is impressed on a conductor 110 to causethe transistor 62 to switch to the opposite or conductive state and thusstart the units count; As was the case above, the transistor 64 will beswitched to the non-conductive state in response to the high positivesignal. 1

Referring now to the signal on the output conductor 106, in-

I itially the transistor 64 is rendered conductiveto ground theconductor 106 and the conductor 106 is subsequently raised to a positivevoltage during the tens count due to the non-conduction of transistor64. However, when the final count is achieved on the units counter andan output signal is impressed on conductor 102 to switch the state ofthe transistor 62, the signal level on conductor 106 will go to groundpotential. This signal is fed to the base electrode of an outputtransistor 114 through a capacitor 1 16. It should be noted that thecapacitor 116'is connected to the positive volt potential on conductor30 through a resistor 118 and is connected to the same 15 volt potentialof conductor 30 through a conductor 120 and a resistor 122 during theperiod that the transistor 64 is non-conductivea' l'hus, through theaction of capacitor 116, the transistor 114 is rendered conductiveduring the reset period and the period that the system is counting thetens and units. However, when the transistor 64 is switched to the finalconductive state to indicate the end of the units count, the transistor114 is rendered non-conductive to provide a positive pulse at an outputconductor 128 connected to the collectorelectrode of transistorl.l4.-This pulse is utilized to advance the sequence of the weldingsystemfrom, for example,

squeeze to weld, or weld to hold, or hold-to off. For a preferred formof sequencer circuit which may be utilized, the

disclosure of application Ser. No. 58,126, filed July 24, I970.

minal 142 is provided with a positive signal sufficient to back biasinput diode I50 and the remaining terminals 144,146 and 148 are groundedto groundthe conductors 152, 154, 156 for the non-selectedfunctions.Upon applying the positive pulse to conductor 142, current ispermitted-to flow from'a main conductor 158 connected to a positivesource of IS volt potential through a resistor 160 and a diode 162.Assume, for purposes of illustration, that a count of 38 pulses has beenselected for the squeeze portion of the cycle. Accordingly, a switcharmature 170 is moved downwardly, to engage a 30 count contact 172.Thus, current will flow from conductor 158 through resistor 160, diode162, armature 170, terminal 172 and a thirties resistor 174 and atwenties resistor 176. It will be noted that the resistor 160 providesthe resistance for a tens count. Current then flows through a commonconductor 180 to charge a capacitor 182 through aresistor 184. Currentwill not flow in any of the other circuits corresponding to the weld,hold or off portions of the cycle due to the factthat the lower end ofthe resistors 188, 190, 192 are grounded by appropriate. signals beingimpressed 0n conductors 144, 146 and 148. v

Thus, the current flowing through the resistor 184 will cause capacitor182 to charge in accordance with the amount of resistance connected inseries between the capacitor and the source of potential at conductor158. In the case .of a thirties count, the resistance will include aresistor 160, a resistor 174 a resistor 176 and a resistor 184. Thecircuit is also provided with a fourties through nineties resistor190'through 200, respectively. I

The charge on capacitor 182 is a direct function of the amount ofresistance in series with the capacitor, and thus the number of tenspulses to be countedu It is the charge on capacitor 182 that is utilizedto break over a unijunction transistor 204, the emitter of which isconnected to the capacitor 182. However, the base voltage oftheunijunction transistor 204, as supplied by resistor 206 connected toconductor 158 and a conductor 208 is insufficient to permit the breakingover, of the unijunction transistor in response to the voltage impressedon capacitor 182. However, the system further includes a variablepotentiometer 210 which. is connected to the single-shot multi-vibratorcircuit 140 by, means of a conductor 212.

When the system is in the tens portion of the count, a pulse isimpressed on'conductor 212, which goes from a high positive potentialdown to a lower potential, near zero. Thus, the

voltage at the base electrode, connected to the conductor 208,

is caused to be sufficiently low to permit the charge on capacitor 182to breakover the unijunction transistor 204 at the selected count. Thepotentiometer 210 is adjusted to adjust the voltage being fedto the baseelectrode and it is'to be noted that the charge on capacitor 182necessary tobreak over the unijunction transistor 204 is the same forall counts. It is merely a matter of the le'ngth of time it takesthecapacitor 182 to achieve that charge as varied by the increasedresistance supplied in series with the capacitor in response to a higherselected count.

When the selected count has been reached and the unijunction transistor204 has been broken over, current will flow from the base one base twocircuit, through a resistor 214, to provide a positive pulseto the baseelectrode of an output transistor 218, through a resistor 220. Thispulse causes transistor 218 to switch from the normally non-conductivestate to conductive state thereby dropping the potentialon conductor 84from a positive to a relatively low potential near ground. This pulse isutilized to switch the states of the flip flop circuit 12 described inconjunction with FIG. 1.

Referring now to the units circuit.138,,'and particularly to the pulsegenerated on conductor 112 in response to the sensing of 10 inputpulses, it is seen that the circuit 138 includes a capacitor 230 whichis connected to the emitter ele ctrode of an. output unijunctiontransistor 232. During the period that the system is in the tens count,theconductor 94 is grounded to ground, or disable', the units counter136. A

synchronizing pulse is impressed'on conductor 22, connected to the baseelectrode of the unijunction transistor 232, to propulses'impressed onconductor 22, the capacitor 230 will-have achieved a sufficient chargeto break over unijunction transistor 232 at the time that the thsynchronizing pulse is impressed on conductor 22. v Thus, theunijunction transistor 232 will conduct and-provide current flow througha resistor 240. This provides a positive potential which is fed to an'ormallynon-conductive transistor 250 through a resistor 252." Theresistor2501forms half ofa single-shot multi-vibrator circuit, the otherhalf being formed by a normally cojnductive transistor 254. Thecollector electrodeof transistor 250 isconnected to the base electrodeof transistor 254 by means of a capacitor 258, as. is conventio nal inthe art. It will be noted that the collector electrode of transistor254'. is connected to the positive source of volt potential by means'ofa conductor 260and a resistor 262. The base bias forthe'transistor 254is supplied by a resistor 264 and'the capacitor 258, as is conventionalin the art. When the transistor 250 is rendered conductive, thesynchronizing pulse is placed on conductor 212 as described above.

However,v during' the units count, the conductor 1 98 is grounded,thereby grounding the lower end of resistor 236 and removing theresistor 236from circuit with capacitor 230. Also, a reset circuit,including a resistor 268 and diode 270 connected. to an input terminal272, is provided toinsure that the capacitor 230 is dischargedinitially. Thus,-a ground signal is'impressed on conductor 272.A'similar provision has been made for the tens capacitor 182 by meansofa resistor 274, a

'diode276 and a conductor 278. A ground signal impressed on conductor278 will.insure that capacitor 182 is initially discharged.

. It will be noted that the transistor 250 is also utilized as the'output transistor to provide the switching pulse on conductor 102.However, during thetens count, the; transistor 62 was non-conductive,andgrounding conductor 102 will; not affect this condition. However, inthe casewhere the units count is being completed,'thegrounding ofconductor 102. will cause previously conductive transistor 62 to'becomenon-conductive. Also, itwillbe noted that conductor 110 is connected'toacommon line 280which is in actuality the zero tens count'for the'tenscounter circuit 132(Thus, if any particular portion of the welding cycleprovides for a zero tens count, a pulse will immediately be placed onconductor 110 to switch the flip flop circuit 12 to the units countingstate thereby enabling the units counter circuit 136. The enabling ofunits counter circuit 136 occurs when a positive signal is impressed onconductor 94 to back bias a diode 282. I

It will be noted that the units counter circuit 136 is substantiallyidentical to that described .in conjunction with the tens countercircuit 132. Accordingly, a plurality of input terminals 286, 288, 290,292 are provided and correspond to the squeeze, weld, hold and offportions ofthe cycle, respectively. The conductors are connected toindividual diodes 294 to 300 which in turn are connected to theconductor 158 through resistors 302, 304,306 and 308. Thus, when any oneofthe conductors 286, 288, 290, 292is supplied with a positivepotential, the respective diode 294 to 300 will be back biased to permitcurrent to flow through the corresponding transistor 302 to 308. Theremaining diodes, of course, are grounded through their respectiveconductors.

The units counter includes a plurality of resistors 312 conthe desiredcount. In the previous example, the squeezeportion of the cycle wasstated to be 38 pulses. Accordingly, an

armature 316.-would be moved tothe eighth terminal 318 so.

that current, during the squeeze portion of the; cycle, wouldflowthrough resistor 302, terminal-316, terminal 318 and all theresistors connected between'terminal 3'l8 and capacitor This currentwill then flow to=thecapacitor 230 by means of a diode 320 to charge thecapacitorto a preselected voltage. the time required to'reach thatvoltage beingdeterminediby the number of resistors connected in seriescircuit with the capacitor 230. When the-proper voltage has been reachedon capacitor 230 and a synchronizingpulse is impressedon conductor 22,the unijunction transistor 232 will break down to cause transistor 25010conduct.

While it will be apparent that the;preferredembodiments of the inventiondisclosedare well calculatedtoSfulfillthe objects above stated, it will.be appreciated that the-"invention is susceptible tomodification,variationandchange withoutdeparting from the proper scopeor fair meaning-of the subjoined claims. I t -What is claimed is: i yv 1. An analog, line synchronized'timing system for timing preselectedperiods of timefor a plurality of events including a source of pulsatingvoltage, thesystem comprising-first; and. second analog. timersinterconnected to sequentially. time units and tens portionandsubsequentlyselecting said units portion, and circuit means forsynchronizing the completion of the units count with a characteristic ofthe source voltage. v 2. The system of claim I wherein saidpulsatingvoltage isa sinusoidal, alternating current'signal. z

.3. The system of claim 1 wherein said synchronizing circuit meansincludes pulse generating circuit. means connected to said source ofpulsating voltage.

4. The system of claim 3 -whereinsaid. pulse: generating means generatesan output spike pulse in response-to the sensing of substantially thestart of a half wave of saidpul sat-- mg source. 7 g y 5. The system ofclaim 4 wherein the unitscounter includes. a controllable semiconductoroutput device and a timing .circuit, the timing circuit means andnthesynchronizing circuit providing output signals which coincide ata pointin time to signal the completion of the units count. v

6. The system of claim Swherein said units analog timer provides anincreasing timing voltage in response to the I ages occurs at thepreselected units time and at the characnected in identical manner tothose described'in conjunction 1 with circuit 132 and the squeeze, weld,hold and off portion circuits include aplurality of individual armatures314 which may be moved to the respective terminals corresponding toteristic of the source of voltage occurring after the'pre selected unitstime. i i

10. The system of claim 9 wherein said pulse generating means includes asquare wave generator for squaring the pulsating voltage, and a pulsegenerator which generates the spike pulse at the leading edge of thesquare wave.

11. The system ofclaim 10 wherein said pulse generating' circuitincludes amplitude adjustment means for selectively adjustingthe-amplitude of the spike pulse.

12. The system of claim 11 wherein said amplitude adjustment adjusts theresponse of said controllable device.

13. The system of claim 12 wherein said controllable device is aunijunction transistor.

is a programmable unijunction transistor.

15. A method of timing preselected'periods of time for a 14. The systemof claim 13 wherein said controllable device I plurality of events froma source of pulsating voltage, the

method including the steps of timing units and tens portions of 7 eachperiodby selecting said tens portion and subsequently selecting saidunits portion, and synchronizing the completion 7 of a units count withthe characteristic of a source voltage.

16. The method of claim further including the step of generating anoutput spike pulse in response 'to the sensing of substantially thestart of a half wave of the pulsating source.

17. The method of claim 16 wherein the completion of the preselectedunits count generates a completion pulse, the

' method further including the step'of correlating the comple- I tionsignal with the output spike pulse.

1. An analog, line synchronized timing system for timing preselectedperiods of time for a plurality of events including a source ofpulsating voltage, the system comprising first and second aNalog timersinterconnected to sequentially time units and tens portion andsubsequently selecting said units portion, and circuit means forsynchronizing the completion of the units count with a characteristic ofthe source voltage.
 2. The system of claim 1 wherein said pulsatingvoltage is a sinusoidal, alternating current signal.
 3. The system ofclaim 1 wherein said synchronizing circuit means includes pulsegenerating circuit means connected to said source of pulsating voltage.4. The system of claim 3 wherein said pulse generating means generatesan output spike pulse in response to the sensing of substantially thestart of a half wave of said pulsating source.
 5. The system of claim 4wherein the units counter includes a controllable semiconductor outputdevice and a timing circuit, the timing circuit means and thesynchronizing circuit providing output signals which coincide at a pointin time to signal the completion of the units count.
 6. The system ofclaim 5 wherein said units analog timer provides an increasing timingvoltage in response to the passage of time.
 7. The system of claim 6wherein said controllable device has at least two electrodes, said unitstimer being connected to one electrode and said synchronizing circuitmeans being connected to the other electrode.
 8. The system of claim 7wherein said controllable device achieves a conductive state when therelative voltage between the said at least two electrodes achieves apreselected relation.
 9. The system of claim 8 wherein said relationshipof voltages occurs at the preselected units time and at thecharacteristic of the source of voltage occurring after the preselectedunits time.
 10. The system of claim 9 wherein said pulse generatingmeans includes a square wave generator for squaring the pulsatingvoltage, and a pulse generator which generates the spike pulse at theleading edge of the square wave.
 11. The system of claim 10 wherein saidpulse generating circuit includes amplitude adjustment means forselectively adjusting the amplitude of the spike pulse.
 12. The systemof claim 11 wherein said amplitude adjustment adjusts the response ofsaid controllable device.
 13. The system of claim 12 wherein saidcontrollable device is a unijunction transistor.
 14. The system of claim13 wherein said controllable device is a programmable unijunctiontransistor.
 15. A method of timing preselected periods of time for aplurality of events from a source of pulsating voltage, the methodincluding the steps of timing units and tens portions of each period byselecting said tens portion and subsequently selecting said unitsportion, and synchronizing the completion of a units count with thecharacteristic of a source voltage.
 16. The method of claim 15 furtherincluding the step of generating an output spike pulse in response tothe sensing of substantially the start of a half wave of the pulsatingsource.
 17. The method of claim 16 wherein the completion of thepreselected units count generates a completion pulse, the method furtherincluding the step of correlating the completion signal with the outputspike pulse.
 18. The method of claim 17 further including the step ofgenerating a final output pulse at the coincidence of the completionpulse and the pulse spike occuring after the completion pulse.